China’s Semiconductor
Substitution Strategy

China’s semiconductor strategy is often reduced to one bottleneck: extreme ultraviolet lithography. That bottleneck is real. ASML’s EUV systems sit near the center of the most advanced logic-chip race, and export controls have made access to leading-edge tools a strategic constraint for Chinese firms.

But the Chinese discussion around semiconductor self-reliance is broader than “replace ASML.” It is increasingly about ecosystem formation: who gives domestic equipment makers real production lines to test on, who buys local materials at scale, who absorbs early yield risk, who coordinates process feedback, and who supplies the cash flow that lets suppliers survive long enough to improve.

The Chinese term “yangmou” is useful here: an open, visible strategic move rather than a hidden conspiracy. The useful English reading is not that China has found a shortcut around every chip constraint. It is that Beijing and leading firms are trying to make semiconductor substitution a system problem, not a single-machine problem.

That distinction is easy to miss from outside China. English coverage tends to ask whether China can make a 2-nanometer logic chip, whether SMIC can obtain an EUV scanner, or whether Huawei has somehow escaped the physics and supply-chain limits that still shape the industry. Those are legitimate questions, but they sit at the end of the chain. Chinese industrial policy is also trying to work on the middle of the chain: the unromantic routines by which a domestic tool becomes trusted, a domestic material becomes qualified, and a domestic supplier becomes boring enough to use every day.

The result is a strategy that looks less like a moonshot and more like a long campaign of forced learning. Memory chips, especially DRAM and NAND, are useful because they create a harsh classroom. The classroom is expensive, cyclical, and unforgiving. But if domestic suppliers can survive there, their engineering discipline improves in ways that slogans cannot produce.

The short answer

China’s semiconductor substitution strategy is shifting from a narrow race to reproduce the most advanced foreign tool toward a wider effort to build domestic production ecosystems around memory, equipment, materials, process validation, and anchor customers.

Memory producers such as CXMT in DRAM and YMTC in 3D NAND matter because they can become large, recurring buyers and testers for Chinese semiconductor equipment and materials. A domestic etching tool, deposition tool, polishing slurry, wafer, target, or photoresist does not become credible because it works in a lab. It becomes credible when a high-volume fab uses it, finds the process problems, sends feedback, and keeps buying improved versions.

That is why the memory route matters. It does not eliminate the EUV bottleneck, and it does not prove China can immediately match the leading edge in logic chips. But it may create a practical path for building equipment and materials capability through production learning.

The strategy has three moving parts. First, large domestic fabs create demand that is big enough for suppliers to organize around. Second, those fabs create qualification pressure, because a supplier that cannot meet yield, purity, uptime, and service standards will damage production. Third, capital markets and state policy provide enough time and balance-sheet support for suppliers to keep iterating through the painful early stage.

That is the “open move.” It is visible to competitors, customers, investors, and regulators. It is also difficult to stop with one control list, because it is distributed across hundreds of process steps and thousands of supplier interactions.

Layer	What China is trying to build	Why memory fabs matter
Device and architecture	Alternative chip-design and scaling ideas	Huawei’s tau-law proposal shows the search for non-classical scaling routes, but it remains a claim that must be judged by product results.
Memory production	DRAM and NAND capacity with domestic firms	CXMT and YMTC provide real fabs, product cycles, and high-volume process needs.
Equipment	Etching, deposition, cleaning, metrology, packaging, and other tools	Equipment makers need live wafer data, yield feedback, and repeat orders.
Materials	Wafers, gases, slurries, targets, films, chemicals, and photoresists	Materials have to be qualified inside actual production flows.
Logic spillover	Foundry and advanced packaging capability	Matured tools and process know-how can later support SMIC, Hua Hong, and other logic-related manufacturing, but transfer is partial and slow.

Why “semiconductor substitution” is a misleadingly simple phrase

Substitution sounds like a shopping list. Replace imported lithography machines, imported etchers, imported deposition tools, imported software, imported materials, and imported components with Chinese equivalents. Once every line item has a domestic supplier, the job is done.

Semiconductors do not work that way.

A chip fab is not a warehouse of machines. It is a tightly tuned production system. Each tool interacts with a process recipe, a material stack, a cleanroom environment, defect-control routines, metrology data, yield targets, and customer requirements. A machine can be technically impressive and still fail in production if it is unstable, hard to maintain, incompatible with the process window, or unable to generate repeatable yield.

That is why the real bottleneck is not only invention. It is qualification.

Qualification is slow because every substitution changes the system around it. A local etching tool may require a different recipe. A domestic chemical may behave slightly differently under heat, pressure, or plasma. A polishing slurry may change surface roughness by a tiny amount that later affects yield. A new component may be easy to buy but difficult to service. These are not problems that can be solved by a press release. They require engineers from the fab and the supplier to sit with the defect data, adjust the process window, run wafers again, and decide whether the tool is ready for more serious production.

In the global semiconductor industry, leading equipment suppliers grew with leading customers. Applied Materials, Lam Research, Tokyo Electron, ASML, and other toolmakers improved because large chipmakers gave them demanding use cases, production feedback, and long upgrade cycles. Samsung, TSMC, Intel, Micron, SK hynix, and others were not merely buyers. They were co-developers in practice.

China’s problem is that many domestic suppliers have had too few chances to learn inside high-volume, high-stakes fabs. Without production access, they cannot prove reliability. Without reliability, they cannot win orders. Without orders, they cannot fund the next generation. This is the trap that industrial substitution has to break.

The trap is especially severe in semiconductors because customers are rationally conservative. A fab manager is not paid to take patriotic risk. A small defect excursion can destroy output, delay customer shipments, and consume months of engineering attention. If a foreign tool already works, the local substitute must offer more than a national story. It must offer performance, availability, service, cost control, or a security reason strong enough to justify the disruption.

That is why anchor customers matter so much. A domestic supplier needs someone powerful enough to say: we will try this, we will absorb some learning cost, and we will keep the supplier in the loop if the first version is not good enough.

The supply-chain map: where substitution actually happens

The public imagination of chipmaking often jumps from “design” to “fab” to “chip.” In reality, substitution has to happen across a dense stack of goods and routines.

At the top are design tools, IP, architecture choices, and product roadmaps. Below that sit wafer fabrication processes, lithography, etching, deposition, ion implantation, cleaning, metrology, inspection, chemical mechanical polishing, and thermal treatment. Around those steps are consumables and materials: wafers, gases, wet chemicals, slurries, targets, masks, films, resists, filters, valves, pumps, and precision components. After fabrication come packaging, testing, substrates, advanced packaging equipment, memory interfaces, firmware, and customer qualification.

The point is not that China must localize everything at once. The point is that each localized layer changes the next layer’s constraints.

Segment	Why it is difficult to substitute	What progress would look like
Design software and IP	Toolchains, verification, libraries, and customer trust are deeply embedded.	Domestic tools gain use in narrower workflows before replacing full sign-off flows.
Lithography	EUV is the most visible choke point, and DUV is also complex at high performance.	Better use of available DUV, process tricks, packaging, and design-system co-optimization.
Etch and deposition	Recipes are tightly linked to device structures and yield.	More domestic tools qualify in mature and memory-related process steps.
Metrology and inspection	Defects have to be detected early, consistently, and at scale.	Local tools move from auxiliary roles into production-critical measurement.
Materials and chemicals	Purity, consistency, and contamination control decide yield.	Domestic materials survive repeated qualification across production cycles.
Packaging and testing	AI and memory demand more advanced integration, not only smaller nodes.	Domestic advanced packaging tools and substrates become more credible.

This map also explains why the memory route has strategic value. Memory production touches many of these layers. It does not solve every one, but it creates repeated pressure across enough of them to matter.

Why memory is not a consolation prize

It is tempting to treat memory as a second-best path because the most glamorous chip headlines involve GPUs, smartphone processors, and leading-edge logic. That is the wrong instinct.

Memory sits inside almost every serious compute story. AI servers need high-bandwidth memory and large pools of DRAM. Smartphones need DRAM and NAND. PCs, cars, industrial devices, and data centers all depend on memory. Even if China’s semiconductor strategy begins with a narrow security goal, the commercial market forces it to care about ordinary, high-volume chips.

Memory also has a brutal economic lesson built in. DRAM and NAND prices move in cycles. When supply is tight, profits can surge and capital expenditure looks easy to justify. When supply overshoots, margins collapse and weaker players are punished. That cyclicality is painful, but it disciplines firms. It means a domestic memory champion cannot live forever on policy language. It must eventually produce chips that customers are willing to buy through the cycle.

For industrial upgrading, that pressure is useful. A supplier that can support a memory producer through a downcycle, a product transition, and a yield ramp is a stronger supplier than one that only wins a symbolic order during a subsidy boom.

Why memory is the strategic test bed

Memory chips are not easy. DRAM and NAND are brutally competitive, capital-intensive, cyclical, and technologically demanding. But they are also different from leading-edge logic. They depend heavily on process integration, yield learning, equipment tuning, materials qualification, and production scale.

That makes memory a useful training ground for a domestic semiconductor ecosystem.

CXMT describes itself as a company focused on DRAM design, manufacturing, sales, and R&D. YMTC describes itself as a memory IDM offering 3D NAND wafers and dies, embedded storage chips, consumer and enterprise SSDs, and related solutions. In plain English, both are not only chip designers. They are manufacturing-heavy firms with real fabs.

That matters because the most valuable thing they can give domestic suppliers is not patriotic endorsement. It is production pressure.

What a domestic supplier needs	Why a memory fab can provide it
Wafer-level test data	Defects only appear clearly when tools run real process flows.
Iteration with engineers	Tool settings, materials behavior, and process recipes need repeated adjustment.
Volume orders	Suppliers need revenue to retain engineers and fund next-generation products.
Qualification discipline	A fab forces suppliers to meet reliability, maintenance, contamination, and yield standards.
Roadmap pressure	DRAM and NAND upgrades create recurring demand for better tools and materials.

This is why the Chinese phrase “chain leader” matters. A chain leader is not simply the largest company. It is the firm that can organize suppliers around a demanding production target.

In telecommunications, China used large operators and system vendors to create demand for domestic equipment and standards. Memory is harder because the final customers are commercial device, PC, server, and data-center buyers who care about price, reliability, and performance. Policy support helps, but it cannot fully replace market discipline.

That is precisely why CXMT and YMTC are important. They sit between state strategy and commercial competition.

They also sit between two definitions of self-reliance. The narrow definition is “use Chinese suppliers.” The stronger definition is “create suppliers that customers would use even when they have alternatives.” The second definition takes longer, but it is the only one that can survive beyond policy cycles.

CXMT’s IPO shows the financing logic

The financing side is not a side story. Semiconductor manufacturing absorbs capital relentlessly. A firm has to pay for fabs, tools, R&D, process upgrades, product qualification, inventory, and cyclical downturns long before it enjoys stable profits.

CXMT’s Star Market materials show this clearly. The Shanghai Stock Exchange project data list CXMT’s planned fundraising amount at RMB 29.5 billion. CXMT’s prospectus says the proceeds are planned for three areas: RMB 7.5 billion for memory wafer manufacturing line technology upgrades, RMB 13.0 billion for DRAM technology upgrades, and RMB 9.0 billion for forward-looking DRAM research and development.

Those numbers are not only about CXMT. They are a signal to suppliers. A memory company that raises long-term capital and expands production creates an order book for equipment, materials, and engineering services.

There is an important caveat. CXMT’s prospectus also presents 2026 first-half performance estimates, but it states that these estimates are made by management, unaudited or unreviewed by accountants, and not a profit forecast or commitment. That limitation matters. The industrial story should not be converted into an investment claim.

The industrial point is narrower and more durable: when a large domestic memory manufacturer expands, it creates more chances for domestic suppliers to be tested in real fabs.

This is where the capital market becomes part of industrial policy without becoming the same thing as a subsidy. Equity financing can spread the cost of long-cycle manufacturing investment across public investors. It can also impose disclosure, scrutiny, and market expectations. That combination is uncomfortable but useful. A memory firm that wants to be treated as a national champion still has to explain how it will spend money, how it will upgrade technology, how it will handle losses, and how much uncertainty sits inside its forecasts.

For suppliers, the signal is not merely “CXMT may raise money.” The signal is that the domestic memory ecosystem may have a more visible multi-year capex anchor. Equipment makers, chemical suppliers, parts vendors, and service teams can plan around that anchor, but they also have to compete for it.

Huawei’s tau law is a different kind of signal

Huawei’s May 25, 2026 announcement of “tau law” belongs to a different layer of the story. Huawei describes tau law as a proposal to shift from geometric scaling toward “time scaling” by reducing signal-propagation delay across devices, circuits, chips, and systems. It also highlights LogicFolding as one of the ideas in that system-level approach.

This should not be read as proof that China has solved advanced lithography. It is better read as a sign of strategic search.

When the classical route of shrinking transistor geometry becomes harder, firms look for gains elsewhere: architecture, packaging, memory hierarchy, interconnect, circuit layout, system integration, software optimization, and application-specific design. Some of those gains can be real. None of them make manufacturing constraints disappear.

Huawei’s announcement is therefore useful as context, not as a conclusion. It shows that Chinese firms are trying to widen the definition of semiconductor progress. But the memory-fab story is more concrete because it involves production lines, suppliers, qualification, and procurement.

The two layers should be read together. Tau law is a search for performance beyond classical scaling. Memory fabs are a search for production learning beyond imported ecosystems. One is closer to architecture and system design; the other is closer to manufacturing and supply-chain formation. China needs both, but they mature on different clocks. Architecture claims can be announced quickly. Production ecosystems are proven only after years of yield, uptime, customer qualification, and cost discipline.

The “first memory, then logic” path

The most useful idea is the sequence: first memory, then logic. It is not a law. It is a possible industrial-learning path.

The logic is simple:

1. Memory fabs create recurring demand for equipment and materials.
2. Domestic suppliers enter less impossible process windows first.
3. Suppliers improve through production feedback, not lab claims.
4. Some tools, materials, and process lessons become usable in logic fabs.
5. Logic foundries benefit, but only where the process requirements overlap.

The last point is the one that should prevent overstatement. A qualified tool in a memory process does not automatically qualify for advanced logic. Logic and memory have different device structures, process flows, customers, defect tolerances, and scaling pressures. The transfer is real in some categories and limited in others.

The better phrase is not “memory solves logic.” It is “memory creates learning density.”

Learning density is valuable because semiconductor improvement is cumulative. A supplier that learns how to stabilize a deposition process in one demanding environment is better prepared for the next one. A materials company that learns how to control impurities at one customer becomes more credible at another. A service team that learns how to respond to production failures inside a memory fab can later support more complex customers.

But the path also has traps. Memory can teach the wrong lesson if firms mistake scale for mastery. A company can buy many tools, build capacity, and still struggle if yield, product mix, cost, and customer qualification lag. It can also become overexposed to a memory price cycle. If prices fall just as domestic suppliers need patient iteration, the whole flywheel can slow.

The best version of the strategy therefore requires sequencing, not cheerleading: start where domestic suppliers can learn, measure the results, move into adjacent steps, and resist the urge to declare victory too early.

What domestic equipment makers really gain

For a Chinese semiconductor equipment company, a large domestic memory customer offers four forms of value.

First, it offers a live battlefield for engineering. A supplier can discover leakage, uneven etching, film-thickness problems, particle contamination, maintenance failures, throughput bottlenecks, and metrology gaps only when the tool is used repeatedly in a real fab.

Second, it offers a route to credibility. If a domestic tool passes qualification at a serious memory fab, other customers are more willing to test it.

Third, it offers cash flow. Orders allow suppliers to hire engineers, buy components, improve service teams, and fund new platforms.

Fourth, it creates a local feedback loop. Instead of a Chinese fab depending on a foreign supplier’s global roadmap, a domestic supplier can tune faster to the customer’s process priorities.

This is the industrial flywheel that matters. It is not glamorous. It is also exactly how much of manufacturing capability is built.

The flywheel has a social side as well. Semiconductor equipment companies need process engineers, field-service teams, software specialists, mechanical designers, optics experts, vacuum engineers, and supply-chain managers. Those people become better by seeing failures that only production can reveal. A protected order without hard feedback does little. A painful qualification process can train an organization.

That is one reason China’s semiconductor story should not be read only through company names. The deeper asset is the engineering labor market that forms around fabs. Once enough engineers have lived through tool qualification, yield excursions, customer audits, and process transfers, the industry’s tacit knowledge base changes.

Materials are the quiet second half

Equipment gets more attention because machines are visible. Materials are quieter and often just as difficult.

A fab needs silicon wafers, photoresists, gases, slurries, targets, chemicals, films, specialty components, filters, and packaging materials. Each has to behave predictably inside a process recipe. If a material introduces contamination or variation, it can damage yield across thousands of wafers.

Domestic material substitution therefore depends on the same validation loop:

Material category	What has to be proven
Silicon wafers	Flatness, defect density, consistency, and compatibility with process steps.
Photoresists and chemicals	Patterning behavior, purity, stability, and defect control.
CMP slurries and pads	Removal rate, surface quality, selectivity, and repeatability.
Targets and films	Deposition quality, uniformity, contamination control, and durability.
Gases and wet chemicals	Purity, supply stability, safety, and process compatibility.

This is why the memory-fab route matters beyond memory. Once a material supplier survives repeated qualification, it becomes a more serious candidate for adjacent fabs and process layers.

Materials also reveal why “domestic replacement” is not a binary status. A fab may use a domestic material for one process step, a foreign material for another, and dual-source a third. It may use a domestic supplier in lower-risk layers before trying more critical layers. The public wants a yes-or-no answer. The factory usually moves through percentages, process windows, and fallback plans.

That incrementalism can be frustrating, but it is how risk is managed. A fab that tries to localize too many critical inputs at once may create a yield problem it cannot diagnose. A fab that never tries local alternatives will remain dependent. The art is deciding which substitution to test first, how much risk to absorb, and when a supplier has earned the next opportunity.

The market-discipline problem

There is a tension at the heart of China’s semiconductor strategy.

If substitution is driven only by policy, firms may buy domestic tools that are not competitive enough. That can create protected suppliers but weak products. If substitution is driven only by market efficiency, domestic suppliers may never get enough early-stage production opportunities to catch up. That can preserve short-term efficiency while locking in foreign dependence.

China is trying to solve this by combining state support, capital-market financing, procurement preference, and commercial competition. The balance is hard.

Memory makes the problem especially sharp because DRAM and NAND are commodity-like markets. Buyers care about price, endurance, compatibility, power, capacity, and reliability. Device makers and data-center customers will not permanently pay for weak products merely because the supplier is domestic.

So the substitution strategy must pass two tests:

Test	What success looks like
Policy test	Domestic suppliers get enough early production opportunities to learn.
Market test	The final memory products remain competitive enough for commercial customers.

If the first test fails, the ecosystem never matures. If the second test fails, the ecosystem becomes expensive and fragile.

This tension is not unique to China. South Korea, Taiwan, Japan, the United States, and Europe have all used forms of state support, procurement, research funding, tax incentives, export controls, or defense demand to shape semiconductor capacity. The difference is that China is trying to build under unusually direct technology restrictions while also serving the world’s largest electronics manufacturing base.

That gives China both urgency and leverage. Urgency comes from the risk that external controls tighten faster than domestic suppliers improve. Leverage comes from demand: smartphones, PCs, servers, industrial equipment, EVs, consumer electronics, and AI infrastructure all create a domestic market for chips and components. The question is whether that market can be converted into learning rather than merely protected demand.

There is also a consumer-facing constraint. A phone maker, PC maker, server vendor, or cloud operator may welcome a domestic supply option for resilience. But if the chip fails, overheats, underperforms, or costs too much, the political benefit does not repair the customer relationship. Commercial discipline eventually returns through the product.

What English readers often miss

English-language coverage often focuses on the export-control headline: what the United States, the Netherlands, or Japan will allow Chinese firms to buy. That is necessary, but incomplete.

Inside China, the harder question is operational: who will organize the missing ecosystem?

That question has several parts:

• Can domestic fabs give local suppliers enough production access without damaging yield?
• Can equipment companies improve fast enough when real defects appear?
• Can material suppliers meet purity and repeatability requirements?
• Can financing survive the memory cycle?
• Can customers trust domestic DRAM and NAND outside policy-protected channels?
• Can learning from memory migrate to logic, advanced packaging, and AI-related compute hardware?

These are not slogan questions. They are factory questions.

They are also time questions. Semiconductor capacity is built through cycles measured in years. A tool qualification cycle can take months. A fab ramp can take longer. A new material may need repeated reliability data. A customer may demand evidence across multiple lots before approving a part. Policy announcements move faster than all of this, which is why semiconductor narratives often become overheated.

The most useful way to read China’s semiconductor push is therefore not as a single breakthrough story, but as a compounding process. Small improvements in domestic tools matter if they repeat. Small gains in material qualification matter if they spread. A single domestic order is not decisive; repeat orders and customer expansion are.

How to read the next round of announcements

Readers should be careful with the verbs used in semiconductor news. “Announced,” “developed,” “sampled,” “qualified,” “mass-produced,” “adopted,” and “expanded” do not mean the same thing.

An announced tool may still be far from production. A sampled chip may work for demonstrations but not yet meet customer reliability standards. A qualified material may be approved for one layer, one customer, or one fab, not for every process. A mass-produced product may still depend on imported equipment. A domestic share increase may reflect policy preference, genuine competitiveness, supply constraints, or all three at once.

For China, the most meaningful signals will be boring:

Signal	Why it matters
Repeat orders from the same fab	The supplier survived initial qualification and remained useful.
Expansion from one process step to adjacent steps	The supplier is becoming part of the process roadmap.
Multi-customer adoption	The product is not dependent on one protected relationship.
Service and uptime data	A tool that cannot stay available is not production-ready.
Customer qualification outside policy channels	Commercial users trust the product enough to buy it voluntarily.

This is the kind of evidence that should shape the next English reading of China’s chip strategy.

Where to be careful

The strongest version of the argument is not that China is certain to win semiconductor self-reliance. It is that China is trying to create the conditions under which semiconductor self-reliance becomes less dependent on a single breakthrough.

Several limits remain.

EUV lithography remains a major constraint for the most advanced logic nodes. Domestic equipment and materials still have to prove yield, reliability, serviceability, and cost. Memory cycles can turn sharply, hurting cash flow just when firms need to keep investing. Export controls can widen from tools to components, software, service, and materials. And domestic substitution can become wasteful if protected suppliers are not forced to improve.

The real question is therefore not whether one announcement changes the game. It is whether China can keep thousands of small engineering feedback loops alive for years.

That is also why this topic connects to new quality productive forces. The phrase can sound abstract, but in semiconductors it has a concrete meaning: firms, fabs, tools, materials, engineers, finance, standards, and policy have to become one productive system.

It also connects to AI, data, and compute in China’s 15th Five-Year Plan. AI demand increases the value of memory, advanced packaging, power efficiency, and data-center hardware. If China wants AI adoption at industrial scale, it cannot treat chips as a separate strategic theater. Compute demand, electricity, memory supply, chip packaging, model efficiency, and domestic hardware substitution all pull on one another.

None of this makes success automatic. The more integrated the system becomes, the more failure can travel through it. A weak material supplier can hurt a tool. A tool bottleneck can slow a fab. A memory downcycle can weaken the supplier base. A new export rule can disrupt components that were not previously treated as strategic. A policy push can create overcapacity if it ignores demand quality.

The right conclusion is sober: China has a plausible industrial-learning route, but it is a marathon of process control, supplier discipline, and customer trust. The route is visible. The outcome is not.

What to watch next

• whether CXMT’s IPO proceeds are deployed on schedule into production upgrades, DRAM technology upgrades, and forward-looking R&D;
• whether YMTC continues expanding and qualifying domestic suppliers in 3D NAND production;
• whether Chinese equipment suppliers win repeat orders rather than one-off symbolic placements;
• whether domestic materials pass multi-quarter reliability and yield tests;
• whether Huawei’s tau-law ideas show up in products with measurable performance, power, cost, or density improvements;
• whether SMIC, Hua Hong, and other logic-related fabs adopt tools first validated in memory production;
• whether policy procurement supports domestic suppliers without removing pressure to meet global commercial standards.

FAQ

Does China’s memory strategy solve the ASML EUV problem?

No. Memory-led substitution can strengthen domestic equipment and materials ecosystems, but it does not remove the EUV constraint for the most advanced logic processes.

Why are CXMT and YMTC important?

They are important because they are manufacturing-heavy memory firms. Their fabs can give domestic suppliers real production validation, not just lab testing or policy endorsement.

What does “chain leader” mean in this context?

A chain leader is a company that can organize suppliers around a serious production target. In semiconductors, that means orders, process feedback, qualification discipline, and long-term roadmap pressure.

Is this an investment argument for Chinese semiconductor equipment stocks?

No. The industrial logic is that memory fabs may create demand and validation opportunities for domestic suppliers. That does not determine stock prices, valuation, timing, or investment suitability.

Can memory equipment learning transfer to logic chips?

Partly. Some equipment, materials, process-control lessons, and engineering routines can migrate. But memory and logic have different process requirements, so transfer is uneven and should not be treated as automatic.

Sources and further reading

• Huawei: Huawei announces tau law at IEEE ISCAS 2026.
• Shanghai Stock Exchange project query: CXMT Star Market project data.
• CXMT prospectus PDF: Star Market IPO prospectus filing.
• CXMT: About CXMT.
• YMTC: Company profile.
• ASML: Lithography principles.